# Supercomputer question **URL:** \ **Category:** Factual Questions\ **Created:** [May 23, 2003, 3:18pm UTC](https://boards.straightdope.com/t/supercomputer-question/177042 "2003-05-23T15:18:26Z")\ **Posts on this page:** 6\ **Page:** 1
**Author:** ![High\_Deity](https://avatars.discourse-cdn.com/v4/letter/h/e9a140/32.png) [@High\_Deity](https://boards.straightdope.com/u/High_Deity)\ **Post date:** [May 23, 2003, 3:18pm UTC](https://boards.straightdope.com/t/supercomputer-question/177042/1 "2003-05-23T15:18:26Z")
Short and Sweet: What’s the current max for RAM in a single computer for “supercomptuers”? ---
**Author:** ![Ethilrist](https://sea3.discourse-cdn.com/straightdope/user_avatar/boards.straightdope.com/ethilrist/32/4604_2.png) [@Ethilrist](https://boards.straightdope.com/u/Ethilrist)\ **Post date:** [May 23, 2003, 3:31pm UTC](https://boards.straightdope.com/t/supercomputer-question/177042/2 "2003-05-23T15:31:03Z")
Well, given that [Cray](http://136.162.32.160/news/0204/xfersystem.html) fields a “memory system” which includes a 224 GB hard drive with transfer speeds of 80 GB per _second_, the 32 GB of RAM is kinda miniscule. ---
**Author:** ![Desmostylus](https://avatars.discourse-cdn.com/v4/letter/d/c57346/32.png) [@Desmostylus](https://boards.straightdope.com/u/Desmostylus)\ **Post date:** [May 23, 2003, 3:33pm UTC](https://boards.straightdope.com/t/supercomputer-question/177042/3 "2003-05-23T15:33:48Z")
Depends what you mean by “single computer”. The [NEC Earth Simulator](http://www.nec.co.jp/press/en/0203/0801.html) has 640 nodes, each with 16 GB, for a total of 10 TB. The Earth Simulator isn’t necessarily the computer with the most memory, though. It’s just the fastest supercomputer at the moment. ---
**Author:** ![\_Tim](https://avatars.discourse-cdn.com/v4/letter/_/e47c2d/32.png) [@\_Tim](https://boards.straightdope.com/u/_Tim)\ **Post date:** [May 23, 2003, 3:35pm UTC](https://boards.straightdope.com/t/supercomputer-question/177042/4 "2003-05-23T15:35:15Z")
The Earth Simulator has 10TB memory total (though that’s only 2GB per processor.) ASCI Q is slated to have 12TB, though I’m not sure if it’s done yet. For more supercomputer facts, check out [www.top500.org](http://www.top500.org) Oh, and I’m quite certain the latency on any hard drive will be unacceptably long for good performance as virtual memory, no matter how huge its pipeline is. ---
**Author:** ![Zenster](https://avatars.discourse-cdn.com/v4/letter/z/cdc98d/32.png) [@Zenster](https://boards.straightdope.com/u/Zenster)\ **Post date:** [May 23, 2003, 6:59pm UTC](https://boards.straightdope.com/t/supercomputer-question/177042/5 "2003-05-23T18:59:25Z")
> [@](#): > > \*Originally posted by (Tim) \* > … Oh, and I’m quite certain the latency on any hard drive will be unacceptably long for good performance as virtual memory, no matter how huge its pipeline is. Quite right **(Tim)**. Friends of mine used to work with Seymour. The original Cray I hardware designs averted even the slightest decrease of RAM cycle time. Cray configured the memory stacks as 64 different columns of bulk RAM storage. Each column’s PCBs were clamped onto water cooled high-mass copper cages to conduct heat away from the solid state memory. To further enhance retrieval time, a given 64 bit word had its individual bits stored separately in each of the 64 different RAM columns. This reduced undesirable device heating that might occur if several contiguous word bits were stored adjacently on a single chip. We’ll go into maximum wire lengths later. ---
**Author:** ![buckminster](https://avatars.discourse-cdn.com/v4/letter/b/13edae/32.png) [@buckminster](https://boards.straightdope.com/u/buckminster)\ **Post date:** [May 24, 2003, 11:44pm UTC](https://boards.straightdope.com/t/supercomputer-question/177042/6 "2003-05-24T23:44:50Z")
> [@](#): > > \*Originally posted by Zenster \* > \*\*Quite right **(Tim)**. Friends of mine used to work with Seymour. The original Cray I hardware designs averted even the slightest decrease of RAM cycle time. \*\* Hey, I gotta question for ya. When I worked in the electronic design automation business (software tools for hardware geeks) there was a story going around that the legendary Seymour didn’t use the standard schematics to describe and document the Cray hardware design. Instead he supposedly used boolean equations and other non-graphical design notations. Furthermore all the systems engineers had to use these equations for trouble shooting!! Since all of his design were MSI (medium scale integration- pre CPU on a chip era) implementations its feasible to do it that way and but it sounds pretty bizarre. Maybe your friends might know what the story is on this geek legend?? best regards, buck