# Why do semiconductor-wafer foundries/fabs advance so slowly from 300mm to 400mm to 450mm, etc. **URL:** \ **Category:** Factual Questions\ **Created:** [April 18, 2018, 10:15pm UTC](https://boards.straightdope.com/t/why-do-semiconductor-wafer-foundries-fabs-advance-so-slowly-from-300mm-to-400mm-to-450mm-etc/812664 "2018-04-18T22:15:48Z")\ **Posts on this page:** 12\ **Page:** 2
**Author:** ![beowulff](https://sea3.discourse-cdn.com/straightdope/user_avatar/boards.straightdope.com/beowulff/32/542_2.png) [@beowulff](https://boards.straightdope.com/u/beowulff)\ **Post date:** [April 20, 2018, 9:45pm UTC](https://boards.straightdope.com/t/why-do-semiconductor-wafer-foundries-fabs-advance-so-slowly-from-300mm-to-400mm-to-450mm-etc/812664/21 "2018-04-20T21:45:23Z")
> [@thirdname](#): > > How finely can they cut a wafer? I would think that with a 1mm die size, a majority of the area of the wafer would have to be empty space between the dies that would be lost in the process of cutting them apart. Those are called “scribe lines,” and are under .1mm wide. So, some waste, but not a huge amount. ---
**Author:** ![Grrr](https://sea3.discourse-cdn.com/straightdope/user_avatar/boards.straightdope.com/grrr/32/146_2.png) [@Grrr](https://boards.straightdope.com/u/Grrr)\ **Post date:** [April 20, 2018, 9:53pm UTC](https://boards.straightdope.com/t/why-do-semiconductor-wafer-foundries-fabs-advance-so-slowly-from-300mm-to-400mm-to-450mm-etc/812664/22 "2018-04-20T21:53:04Z")
> [@beowulff](#): > > Those are called “scribe lines,” and are under .1mm wide. > So, some waste, but not a huge amount. The real challenge is back-grind. Shaving off all the excess on the back of the wafer. I do NOT envy the guys who have to work back-grind. ---
**Author:** ![Voyager](https://sea3.discourse-cdn.com/straightdope/user_avatar/boards.straightdope.com/voyager/32/133_2.png) [@Voyager](https://boards.straightdope.com/u/Voyager)\ **Post date:** [April 21, 2018, 12:57am UTC](https://boards.straightdope.com/t/why-do-semiconductor-wafer-foundries-fabs-advance-so-slowly-from-300mm-to-400mm-to-450mm-etc/812664/23 "2018-04-21T00:57:41Z")
> [@beowulff](#): > > Those are called “scribe lines,” and are under .1mm wide. > So, some waste, but not a huge amount. Not even all of that is waste, since the fab puts in some instrumentation in the scribe lines (like 9 per wafer for us, but other products could be different) to monitor the process. We got some but not all this information. ---
**Author:** ![beowulff](https://sea3.discourse-cdn.com/straightdope/user_avatar/boards.straightdope.com/beowulff/32/542_2.png) [@beowulff](https://boards.straightdope.com/u/beowulff)\ **Post date:** [April 21, 2018, 1:23am UTC](https://boards.straightdope.com/t/why-do-semiconductor-wafer-foundries-fabs-advance-so-slowly-from-300mm-to-400mm-to-450mm-etc/812664/24 "2018-04-21T01:23:43Z")
> [@Voyager](#): > > Not even all of that is waste, since the fab puts in some instrumentation in the scribe lines (like 9 per wafer for us, but other products could be different) to monitor the process. We got some but not all this information. Yeah, we used to put alignment chevrons and some test patterns in the scribe lines, but the test guys didn’t like the fact that they couldn’t run burn-in on their test structures. ---
**Author:** ![Voyager](https://sea3.discourse-cdn.com/straightdope/user_avatar/boards.straightdope.com/voyager/32/133_2.png) [@Voyager](https://boards.straightdope.com/u/Voyager)\ **Post date:** [April 21, 2018, 4:17pm UTC](https://boards.straightdope.com/t/why-do-semiconductor-wafer-foundries-fabs-advance-so-slowly-from-300mm-to-400mm-to-450mm-etc/812664/25 "2018-04-21T16:17:20Z")
> [@beowulff](#): > > Yeah, we used to put alignment chevrons and some test patterns in the scribe lines, but the test guys didn’t like the fact that they couldn’t run burn-in on their test structures. Huh? Do you burn in wafers? Burn in is to accelerate reliability failures, and since those structures aren’t going to the customer, why do they think they need to burn them in? ---
**Author:** ![beowulff](https://sea3.discourse-cdn.com/straightdope/user_avatar/boards.straightdope.com/beowulff/32/542_2.png) [@beowulff](https://boards.straightdope.com/u/beowulff)\ **Post date:** [April 21, 2018, 4:37pm UTC](https://boards.straightdope.com/t/why-do-semiconductor-wafer-foundries-fabs-advance-so-slowly-from-300mm-to-400mm-to-450mm-etc/812664/26 "2018-04-21T16:37:27Z")
> [@Voyager](#): > > Huh? Do you burn in wafers? Burn in is to accelerate reliability failures, and since those structures aren’t going to the customer, why do they think they need to burn them in? To do parameter drift testing after exposure to heat and voltage stress. But, I was just the e-beam litho guy, so I don’t know exactly what they were looking at. We used to have dedicated test die that would get packaged and tested separately. ---
**Author:** ![MichaelEmouse](https://sea3.discourse-cdn.com/straightdope/user_avatar/boards.straightdope.com/michaelemouse/32/101_2.png) [@MichaelEmouse](https://boards.straightdope.com/u/MichaelEmouse)\ **Post date:** [April 21, 2018, 4:44pm UTC](https://boards.straightdope.com/t/why-do-semiconductor-wafer-foundries-fabs-advance-so-slowly-from-300mm-to-400mm-to-450mm-etc/812664/27 "2018-04-21T16:44:39Z")
> [@scr4](#): > > [Here](https://www.sonyalpharumors.com/first-images-of-the-real-hasselblad-hv-a-mount-prodcution-version-camera-and-a-look-at-sonys-35mm-sensor-wafer/) you can see a wafer containing 42 SONY full-frame sensors. The largest single-die sensor I could find reference for was [this experimental(?) sensor](https://www.eetimes.com/document.asp?doc_id=1279813&page_number=2), which fills up a full 200mm wafer. Generally, at these sizes, it’s easier and much cheaper to use an array of sensors rather than one big sensor. The “array of sensors” makes me wonder about how a camera (or other device) which uses an array of sensors could be different in capabilities from a camera which uses 1 big sensor. For radar, the switch from mechanically scanned antenna (1 transmitter/receiver and amplifier/phase shifter, much like a typical camera with 1 sensor) to passively electronically scanned array (1 transmitter/receiver and many amplifiers/phase shifters) to active electronically scanned array (many transmitters/receivers and amplifiers/phase shifters) has been a major boon. What would be the advantages of something like that in a camera or other non-radar device? ---
**Author:** ![Dr.Strangelove](https://sea3.discourse-cdn.com/straightdope/user_avatar/boards.straightdope.com/dr.strangelove/32/6613_2.png) [@Dr.Strangelove](https://boards.straightdope.com/u/Dr.Strangelove)\ **Post date:** [April 21, 2018, 8:30pm UTC](https://boards.straightdope.com/t/why-do-semiconductor-wafer-foundries-fabs-advance-so-slowly-from-300mm-to-400mm-to-450mm-etc/812664/28 "2018-04-21T20:30:04Z")
> [@Darren\_Garrison](#): > > Wondering what the largest area CPUs are at the moment, [I see that there is an AMD chip that is 756 mm2](http://digiworthy.com/2017/06/22/intel-skylake-x-vs-threadripper-die-size/). But that is for (gulp) 32 x86 cores. The NVIDIA GV100 is 815 mm[sup]2[/sup] and has 5,376 “cores” (though each of these cores is much less powerful than an x86 core). ---
**Author:** ![Voyager](https://sea3.discourse-cdn.com/straightdope/user_avatar/boards.straightdope.com/voyager/32/133_2.png) [@Voyager](https://boards.straightdope.com/u/Voyager)\ **Post date:** [April 21, 2018, 10:18pm UTC](https://boards.straightdope.com/t/why-do-semiconductor-wafer-foundries-fabs-advance-so-slowly-from-300mm-to-400mm-to-450mm-etc/812664/29 "2018-04-21T22:18:33Z")
> [@beowulff](#): > > To do parameter drift testing after exposure to heat and voltage stress. But, I was just the e-beam litho guy, so I don’t know exactly what they were looking at. We used to have dedicated test die that would get packaged and tested separately. We designed really, really big chips, so we had lots of instrumentation on-chip for this. We definitely tracked parametric drift after burn in. That was some of the data I collected. But that instrumentation was different from that put in between chips on the wafer. We didn’t run test chips during production, but we had them to prove in new cell libraries and new processes. And to zap at Los Alamos. ---
**Author:** ![beowulff](https://sea3.discourse-cdn.com/straightdope/user_avatar/boards.straightdope.com/beowulff/32/542_2.png) [@beowulff](https://boards.straightdope.com/u/beowulff)\ **Post date:** [April 21, 2018, 10:27pm UTC](https://boards.straightdope.com/t/why-do-semiconductor-wafer-foundries-fabs-advance-so-slowly-from-300mm-to-400mm-to-450mm-etc/812664/30 "2018-04-21T22:27:20Z")
When I was in the business (decades ago, now), EEPROM and EAROM where the big things for us. A lot of testing was done to characterize oxide and nitride leakage and mobile ion contamination from processing and packaging. Most of the chips were pretty small (especially compared with the monsters being made today). ---
**Author:** ![Pinmin](https://avatars.discourse-cdn.com/v4/letter/p/4af34b/32.png) [@Pinmin](https://boards.straightdope.com/u/Pinmin)\ **Post date:** [April 21, 2018, 11:31pm UTC](https://boards.straightdope.com/t/why-do-semiconductor-wafer-foundries-fabs-advance-so-slowly-from-300mm-to-400mm-to-450mm-etc/812664/31 "2018-04-21T23:31:24Z")
> [@Grrr](#): > > I’ve worked the SC business for 25 years now. > > Yeah, it all about retooling. There is NOTHING cheap when it comes to retooling. Just the other day one of my techs had to order a (threaded) rod that was all of 12" long. It costs $600 to replace. > Also, converting already proven devices from 200mm to 300mm, isn’t as easy as one would think. It’s not just a matter of re-adjusting “recipe” times. sometimes the engineers have to start from square one again. So, that in itself can be costly. I worked in the industry for 16 years (left a few years ago). I was told by multiple production engineers that the step from 300 to 400 made handling by humans much more difficult and production would have to be retooled around more robotics and automatic handling. Wafers were generally processed in cassettes (also called boats by old timers) holding 25 of them and were manually loaded onto many production tools. The 300mm cassettes were already pretty large and unwieldy to handle. ---
**Author:** ![zombywoof](https://avatars.discourse-cdn.com/v4/letter/z/9e8a1a/32.png) [@zombywoof](https://boards.straightdope.com/u/zombywoof)\ **Post date:** [April 22, 2018, 12:07am UTC](https://boards.straightdope.com/t/why-do-semiconductor-wafer-foundries-fabs-advance-so-slowly-from-300mm-to-400mm-to-450mm-etc/812664/32 "2018-04-22T00:07:10Z")
Note that while 300mm doesn’t sound very large (about a foot), the machines that process those wafers are quite large (think truck sized) and extremely expensive - scale that up 10X and the equipment would be have to be much larger (maybe small airplane sized?) with huge cost consequences for not only the equipment but for the fabs as well. [Previous page](https://boards.straightdope.com/t/why-do-semiconductor-wafer-foundries-fabs-advance-so-slowly-from-300mm-to-400mm-to-450mm-etc/812664.md?page=1)