What was the most expensive computer? What is the most expensive computer currently? What made them so expensive?
I’m aware that the definition of “computer” can get fuzzy so add the necessary caveats.
I don’t have an answer, but aren’t you also going to have to define ‘expensive’ too? Are you including development, construction, operating costs? Just the cost of assembling the raw components? The time of the operators and maintenance personnel? (Thinking of the workers whose sole job was to trawl through ENIAC and replace vacuum tubes.)
Procurement.
NORAD bought IBM’s SAGE computer system for 10 billion 1950s dollars.
That’s interesting, but that price is for around 40 computers and a massive infrastructure.
They are expensive because the parts are expensive and the R&D is expensive. For instance, the world’s current fastest computer (not necessarily the most expensive) has 158,976 CPUs. There’s no way that could ever be cheap.
Depends a bit upon what one defines as a computer. Modern supercomputers are simply very large clusters of mostly conventional parts. Many of them are never run as a single unit, but rather are flexibly subdivided and run lots of different jobs at a time. For a time the Folding at Home project possibly boasted more raw CPU horsepower than the largest supercomputers. And it arguably cost nothing.
Supercomputers were once bespoke hardware. Eye wateringly expensive, bleeding edge design, hand crafted, very limited production. A Cray-1 was about $8m in the 1970’s, close to say $35m today. One CPU. Its quad processor successor, the X-MP, was about the same money inflation adjusted when it came out in 1985.
Nowadays you can buy a space rated computer board from BAE, the RAD5500, for about $200,000. You will be using one of these if you want to build a commercial satellite or planetary exploration probe. As a single computer, and not just a huge cluster of computers in racks, this may well be the most expensive now.
Volume production is what makes modern computers so cheap. Limited volume what makes highly specialised computers expensive. They made about 100 Cray-1s. And it was considered a highly successful model.
Good question. I don’t know the answer, but the Illiac computer at NASA Ames cost $40 million dollars. That would be something like $200 million in today’s dollars.
The most expensive FPGA listed on Digikey is $115,000. That’s a Xilinx Ultrascale+ with 2.8M cells. But the biggest FPGA offered by Xilinx is 9M cells, and given the nonlinear scaling of these things I’d hardly be surprised if the big chip cost north of $400k.
An FPGA isn’t a computer of course, but whatever it’s a part of, it’s some kind of computing element.
I wouldn’t be surprised if some Bitcoin mining computer wasn’t in the running for the currently most expensive. Does the cost of a dedicated power source count? I understand there’s one in British Columbia that has its own hydroelectric dam.
As far as the SAGE computers, they got some of the money back when they retired them. I recall reading that they recovered a bunch of gold before scrapping them. Something like a $quarter million per computer. That was circa 1980.
Didn’t Russia build some Mongo hydroelectric powered bitcoin factory in Irkutsk or the like? (After Googling) Bratsk. Six of one…
It bothers me that so much energy and effort goes into mining cryptocurrencies like Bitcoin.
FPGA is a funny question. No doubt they compute, but usually you are using one to create a bespoke single use case device. Those really expensive ones seem to end up in things like ultra-high performance radar and other signal processing heavy devices. The sort of thing you need a security clearance to just get told about the existence of. Attached FPGAs are a trick used in some supercomputers, with the idea you can code up a specific accelerator for a problem. But they seem to have been overshadowed by GPUs. OTOH, many supercomputers are designed with a single core use case, and they get the precise mix of conventional compute, compute acceleration, memory, communications, tuned for that task.
Configuring any big FPGA as a general purpose processor would be a waste of effort and money. So it comes down to what one defines as a computer.
I was thinking that the most expensive computers might be aboard E-2 Hawkeyes or inside aircraft carriers’ combat information centers.
I take it that FPGAs allow you to have the benefits of an application-specific integrated circuit without paying the cost of designing one?
Why have they been overshadowed by GPGPUs? Couldn’t FPGAs use the same parallelism as GPGPUs in a way that’s specific to their use case?
If supercomputers come to be large assemblies of GPGPUs, what’s going to be the performance bottleneck? Memory bandwidth?
For a single general-purpose computer, surely the IBM 7030 Stretch would be a contender for cost. While it was a disappointment in terms of performance and generally considered a failure, it was in fact the fastest computer in the world for about four years after its release in 1961. Only 9 were ever sold, and IBM was forced to drop its price from $13.5 million ($115.5 million in 2019 dollars) to $7.78 million ($65.56 million in 2019 dollars). Some of its design features, however, were later incorporated into the IBM 70xx series of scientific mainframes and even into the iconic System/360 series later on.
Its performance would be totally dwarfed by even the most humble of today’s desktop or laptop PCs: its 64-bit CPU ran at 1.2 MIPS, and it had 256K 64-bit words of memory (2 megabytes equivalent). It weighed 70,000 pounds and consumed 100kW of power. It was the kind of computer for which even 15 minutes of dedicated time would have been considered an expensive privilege, and for which there was probably enormous competition, like there is today for time on the Hubble telescope.
Don’t know about monetary cost, but the M-5 system cost several hundred lives during its first full field test. And you think you’ve got computer problems: M-5 multitronic unit | Memory Alpha | Fandom
No, you still have to design the chip. What you avoid is the cost to manufacture it, and in particular the upfront costs for masks, etc., which run to the millions of dollars (maybe tens of millions for a modern process).
FPGAs are otherwise worse in every way than an ASIC; as a very approximate rule of thumb, downgrade every metric of interest by about 10x: 1/10 the clock rate, 1/10 the density, 10x the power, etc. The thing is, custom silicon can easily be 100x or 1000x faster depending on the application, so it still ends up being worth it in some cases. This is particularly true of real-time type stuff where you must respond in X nanoseconds to some event. Even if a CPU or GPU technically has more processing power, it likely can’t compete if you need real-time behavior on something or other, like decoding a high-speed serial signal.
GPUs will do better than FPGAs when the application is just a ton of floating point math. The FPGA will do better when the application is a bit more esoteric or specialized; say, crypto work (cryptocurrency mining, password guessing, etc.) or something on the bleeding edge of deep learning like spiking neural nets. A custom ASIC will still be faster but the FPGA will beat the GPU.
Like most clusters, the GPU cluster bottleneck is likely to be the interconnect. GPUs have a ton of memory bandwidth, but to share results means going to a slow interconnect. It’s slow because the clock speeds are necessarily lower for long distances (a few gigahertz instead of >10 GHz) and the bit widths are lower (a few tens of lines instead of 256 or 384).
NVIDIA just bought Mellanox, which specializes in interconnects like Infiniband. It’s not hard to infer from that that they see interconnects as a challenge for future growth of GPU clusters.
Can FPGAs be reconfigured several times? Arguably, brains are FGPAs.
Machine learning: Once a solution is worked out in machine learning software, could you take those virtual neuronal networks and configure an FPGA according to them? I don’t know what specific use cases there would be for that but it seems like it could find a solution to a problem and then make that solution efficient to apply.
Have someone ever tried to make a wafer chip: Use a whole wafer and not care if that means throwing out 9999 duds for that 1 ultrachip?
Would it be possible to make a hybrid between an ASIC and an FPGA? The problem with big chips is the prevalence of defects and the percentage of outright duds, right? Could an ASIC with some FPGA capability patch up or compensate for defects?
Yes you could and you might gain speed by performing operations in parallel, but it depends on the specific network.
An FPGA’s programming is volatile; it doesn’t persist across a power cycle. So not only can it be reprogrammed, but it must be reprogrammed each time it’s turned on. Typically there will be some kind of ROM to configure it at startup, though that isn’t strictly necessary. The ROM might be rewritable flash or write-once variety, depending on the application.
You could, though for the best efficiency I think you’d want to train with the characteristics of the FPGA incorporated somehow. Current neural nets are essentially trained to run fast on a GPU or similar. An FPGA isn’t as good with the raw math but it can do interesting other things like asynchronous operations and changing which neurons connect.
Indeed they have–and for deep learning, as you might expect. Cerebras is the one example I know of.
It’s already done–almost all FPGAs have some dedicated ASIC hardware, often including throwing in a few CPU cores. Though they’re still mostly reconfigurable.
I’m not aware of anyone doing this stuff for defect management, but chip designers do sprinkle in extra gates here and there to help with design defects. It’s very costly to create a new transistor layout (called the base layer) of a chip. It’s much cheaper to tweak the wiring a bit (called the metal layers). If you have some signal that really should have been disabled if another signal is inactive, then it’s really handy if there’s a nearby AND gate you can use to fold in the new signal. You just have to change the wiring then, not the transistor layout.
When you can fix a design flaw this way, it’s called a “metal spin” or ECO (engineering change order; not sure where that came from). And the chip revision will go from A01 to A02, or maybe even A01’. If that’s not possible, you need a very expensive base spin, and the chip revision will go to B01.