Let me second what engineer_comp_geek said (and really, with a user name like that, how can we doubt him?
):
Have a static mat with an integrated resistor in circuit to your wrist strap. The idea is not only to keep everything at the same potential, but also to limit how quickly the charge can transfer (ie, limit the current), when potentials aren’t equal. (Aside: even if you think the charge is equalized, moving equally charged materials closer and further away causes a change in capacitance that can cause temporary voltage spikes.)
Physically within the IC: A static discharge (even one you may not see or feel) is applying a transient voltage that can be in the thousands of volts, for a very brief time. If this current can’t be dumped to ground somehow, this causes pretty much one of 2 failure mechanisms: a dielectric breakdown between two conductors, or a line fusing open.
The dielectric breakdown is like a blown capacitor. There is a charge causing such a large electric field between two points on the chip that the insulator between the two is destroyed. This can be between 2 metal wires on the chip (either adjacent to each other in the same level, or vertically between two levels), or it can burst through what is known for a CMOS transistor as the “gate oxide”, which is the very thin dielectric that makes up the main part of a transistor, between the gate of a transistor and it’s source or drain.
A line fusing open is caused by a line carrying more current than it is equipped to handle - either because there is already a current path (perhaps the one mentioned above) blown, or because it’s normally a contact path between the two lines, or an ESD protection circuit. The heat from the (I*R) drop through the line doesn’t dissipate fast enough, and melts the line.
As circuits get more complex, all of these different wires get closer and closer together, which makes them more and more sensitive to static discharges. This is consistent with your comment that this is more common than it used to be - that’s well known through the industry.
Everyone tries to put some type of protection circuitry on the exposed pins of their chips. This circuitry does nothing in normal operation, but turns on a low resistance path when an extremely high voltage is applied. But again, these only have so much they can handle, and it gets harder and harder to design them as the chips get denser and the minimum sizes of the circuits get smaller.
Hope this helps - I’m always willing to go on with more detail than anyone wants on this topic.