Can someone help me with a PLL please?

http://www.exar.com/products/xr2206.pdf

I am trying to make a 1kHz to 20kHz VCO to use in a PLL for an electronics class. The part above is the function generator we have to use. It hass all the major pieces of a PLL built into it.

This is the way I understand a PLL working and I wanna make sure I understand this corectly before I ask some questions:

External input signal and output signal from VCO are fed into a phase detector, which is basically a signal multiplier, which is also included on this chip.

The multiplier gives you 2 different signals. One is the sum of the 2 and one is the difference of the 2.

You take a LPF and cut out the sum signals. Leaving you with the difference of the signals.

If the difference is zero then everything is great and the PLL just presses on.

If the difference is positive then the PLL speeds up the VCO to match the input signal.

If the difference is negative then the PLL slows down the VCO.

Now, looking at that data sheet I do not see how to configure this thing to run the VCO at 1-20Khz.

Why are there 2 different pins for timing resistors and 2 pins for timing capacitors?

I am unsure what formulas to use to set this up to run at a desired frequency. Do you take the 2 timing caps and match them with the 2 timing resistors using 1/(RC) to equal the 1K and the 20K? I do see that formula mentioned on the FSK diagram on that page, but I am not sure that that applies in this case.

The write up we have in the class for the lab shows a half wave rectifier being used to cut out the negative swing of the output of the PLL. I am not sure what the putpose of this is, though I think it is to have only a positive current feeding back into the VCO for the PLL.

Can anyone point me in the right direction on this thing?

Look at figures 11 and 12. That’s the basic circuit you want.

Take C as, say, 0.01 uF.

Then R = 100 k gives f = 1 kHz, and R = 5 k gives f = 20 kHz.

Maybe you are actually missing something fundamental.

What I described above is how to set it up as a sweep generator from 1 kHz to 20 kHz.

If you’re using it as a PLL, then you don’t use resistors to control the frequency.

Say you want to generate discrete frequencies of 1 kHz, 2 kHz, … 20 kHz.

You feed the output of the VCO into a programmable 1 - 20 divider, and compare the output of the divider with a fixed 1 kHz signal. The result of that comparison feeds into the VCO.

That’s what makes a PLL: VCO, divider, fixed reference, phase comparator.

I think I am confused about something here.

Just to configure the VCO to go frmo 1k-20k I am looking at the formula that they have provided:

f=(1/RC*(1+((R/Rc)*(1-(Vc/3)))

I am understanding this to mean that, basically, for control voltage =3 the VCO will run at (1/RC) and for very small Vc the VCO will run at approx ((1/RC)*(1+(R/Rc)).

So in order to get the VCO to run from 1K to 20K I need to solve the 2 equations at Vc zero for 20Khz and Vc=3 for 1Khz . Does that sound correct?

So I would only need to use one of the 2 timing resistors to do that?

The only thing that concerns me is that, according to that formula, if Vc >3 then I will end up with a negative frequency, which is impossible. What happens to this thing if I were to do that? Would it smoke?

This is just for the VCO. I want to make sure I have this correct.

You’ve got it basically correct regarding the timing.

Don’t worry about setting Vc > 3. If you look at figure 15, you’ll see that you can’t feed current into pin 7 or 8, because you’d be feeding it into a reverse biased PN junction. Vc > 3 just means f = 0.

From my previous example, taking C as 0.01 uF, you get R = 100 k, Rc = 5.265 k.

So I will actually only use either pin 7 OR 8 and not both for this purpose. I also short the cap across pins 5 and 6.

What is the purpose of having 2 seperate timing resistors then?

So to make this PLL I take the input signal and the output of the VCO and send them into the multiplier circuit, then thru a LPF, then I send that signal thru a circuit to convert it to the Vc for the VCO?

I know you said use a divider, but the professor said use the multiplier circuit contained in the package. In what way is this different?

Yes.

In this particular case, you need R and Rc to ensure that you end up with f in the range 1-20 kHz with Vc in the range 0-3 V.

The chip you’re working with is only the VCO. The rest of the PLL isn’t on the chip. Yes, there’s something called a multiplier on the chip, but from the block diagram the chip uses that to turn square waves into sine waves.

I suspect that what the prof refers to as the multiplier, isn’t the on-chip multiplier, but rather the phase detector circuit - probably the diode set up you mentioned in the OP.

<hijack>The phase detector circuit points the way to a greatly improved oscillator. VCOs (Voltage Controlled Oscillators) are not particularly accurate or stable, especially when operated at varying temperatures. A quartz crystal unit is quite possibly the best phase detector device the world has ever seen. With the inclusion of a crystal unit, the oscillator becomes a VCXO (Voltage Controlled Crystal Oscillator) and the stability problem becomes almost nill. Of course, it ain’t quite that simple, but nothing ever is. If you have any interest at all in oscillator technology, take a look at my webpage: http://www.geocities.com/louis33772/ and follow the links to Dr. John Vig’s tutorials. My old industry needs new blood–if you find piezoelectricity interesting, give it some consideration.</hijack>