Quantum physics and silicon chip design

This is a little too speculative for General Questions, but I thought I’d throw it out anyway. I read recently (Telecosm) that chip designers were nearing the lightspeed barrier for the clock pulse on CPU chips; the clock can’t go any faster and still propagate throughout the chip in less than one cycle. The book said that chip designers were expecting to have to divide the chip into autonomous regions with different data handling tasks.

Although it’s impossible to send any signal or information faster than light, maybe that isn’t necessary? All you really need is for the circuits in your chip to all be in sychronization. Could some type of quantum entanglement provided that synchronicity without violating the lightspeed rule?

They are working on entanglement for that reason amongst others yes. Currently however, the parallel processing approach to processor chips is the main thrust because entanglement is only just becoming possible. IBM did demonstrate its usage recently a few month ago using a set of ‘quantum’ bits to calculate and break a difficult encryption algorythm.

The main problem in chip design right now though, is size and oxide densities. Gates are getting small enough that a 2 volt charge can cause punch through, and 150 picoamps (150x10^-12 amps!) of leakage can cause logic errors. Not much room for design or production mistakes there.