Thought triggered by a recent Youtube video.
‘https://www.youtube.com/watch?v=V2h_hJ5MSpY&t=4s’
Has anyone ever come across an architecture in which the stack actually grows upwards in memory?
I’ve worked in low level hardware and software stuff for several decades, and I can’t recall ever coming across one?
I have worked with oddball architectures like the TI9900 which doesn’t have explicit stack instructions.
But an upward-growing stack… can’t think of any example?
Intel 8051
Maybe ARM can do it?
Oh, that’s interesting. I never worked with one of those.
I see it uses memory-mapped rather than on-chip ‘registers’, like the TI9900.
Not inherent in the architecture for any I recall offhand however many instruction sets facilitate stack growth in either direction. The TI9900 was mentioned, other processors had no explicit push/pop instructions while having indirect storage instructions that could implement stacks in either direction. It was common practice in simple memory models that might need a growing string space and a stack with one growing upwards and other downward.
Right, there is nothing that logically requires either direction.
But I’m not sure there are any processor instruction sets which actually have stack instructions which grow upwards (except perhaps the 8051)?
The ‘stack grows downwards’ assumption seems to have been dominant for a long time, though.
At least in most commercially shipped products?
The convention in PDP-11 code was to have the stack grow downward; that is, to push something on the stack you use the -(SP) addressing mode and to pop something off you use (SP)+. But this is just a convention, not embedded in the architecture. It would certainly be possible to write code with the stack growing upwards by using (SP)+ to push and -(SP) to pop.
I assume the earliest concepts had the stack as the only dynamic memory space and since it was addressed indirectly the simplest allocation method was to start it at the top of available memory. I remember Data General had a mode that would create an exception if a stack overflowed but it was horribly slow to use. I don’t recall the details of the DG stack instructions, I mostly used a Slang assembler that gave me a more conventional instruction set.
Interesting: it’s been a long time since I wrote any PDP11 assembler!
I do recall with all of the architectures I’ve worked with that the ‘push’ and ‘pop’ instructions made the ‘downward stack’ assumption, though.
But as we have noted, it doesn’t have to be hardwired into the processor instruction set; you can create a stack without hardware instruction assist.
It’s all a bit moot now, since hardly anyone other than very specialized programmers write assembler!
Though I could probably do at least as well as these whippersnappers since I trained as a hardware engineer… 
I have a feeling that the ICL 2900 ran stacks forward in memory. It was a very sophisticated architecture, and it didn’t need the very basic memory layout that basically just split memory into two.
Then you can talk about all the really fun architectures. The various flavours of Lisp Machines, the iapx 432, and Linn Rekersiv. All of these machines implemented proper stack objects, and didn’t necessarily allocate stack frames contiguously in memory anyway.
I’ve never worked on mainframes. Wikipedia does mention that the 2900 had hardware stack support, though it doesn’t say anything about the memory direction?
I’m sure there have been a lot of weird and wonderful architectures in academic and other research environments. I’ve always worked for commercial companies, so the stuff I’ve been exposed to has been pretty mainstream.
Though even in commercial stuff, there was a lot more diversity in the 80’s and 90’s than today. More interesting times, in some ways…